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LTC2245

2245fa

DIGITAL OUTPUTS

Table 1 shows the relationship between the analog input

voltage, the digital data bits, and the overflow bit.

As with all high speed/high resolution converters, the

digital output loading can affect the performance. The

digital outputs of the LTC2245 should drive a minimal

capacitive load to avoid possible interaction between the

digital outputs and sensitive input circuitry. The output

should be buffered with a device such as an ALVCH16373

CMOS latch. For full speed operation the capacitive load

should be kept under 10pF.

Lower OV

voltages will also help reduce interference

from the digital outputs.

Data Format

Using the MODE pin, the LTC2245 parallel digital output

can be selected for offset binary or 2’s complement

format. Connecting MODE to GND or 1/3V

selects offset

binary output format. Connecting MODE to

2/3V

or V

selects 2’s complement output format.

An external resistor divider can be used to set the 1/3V

or 2/3V

logic values. Table 2 shows the logic states for

the MODE pin.

APPLICATIO S I FOR ATIO

WUUU

Digital Output Buffers

Figure 9 shows an equivalent circuit for a single output

buffer. Each buffer is powered by OV

and OGND, iso-

lated from the ADC power and ground. The additional

N-channel transistor in the output driver allows operation

down to low voltages. The internal resistor in series with

the output makes the output appear as 50Ω to external

circuitry and may eliminate the need for external damping

resistors.

Table 1. Output Codes vs Input Voltage

– A

–

D13 – D0 D13 – D0

(2V Range) OF (Offset Binary) (2’s Complement)

>+1.000000V 1 11 1111 1111 1111 01 1111 1111 1111

+0.999878V 0 11 1111 1111 1111 01 1111 1111 1111

+0.999756V 0 11 1111 1111 1110 01 1111 1111 1110

+0.000122V 0 10 0000 0000 0001 00 0000 0000 0001

0.000000V 0 10 0000 0000 0000 00 0000 0000 0000

–0.000122V 0 01 1111 1111 1111 11 1111 1111 1111

–0.000244V 0 01 1111 1111 1110 11 1111 1111 1110

–0.999878V 0 00 0000 0000 0001 10 0000 0000 0001

–1.000000V 0 00 0000 0000 0000 10 0000 0000 0000

<–1.000000V 1 00 0000 0000 0000 10 0000 0000 0000

LTC2245

2245 F09

0.1µF

43Ω

TYPICAL

DATA

OUTPUT

OGND

0.5V

TO 3.6V

PREDRIVER

LOGIC

DATA

FROM

LATCH

Figure 9. Digital Output Buffer

Table 2. MODE Pin Function

Clock Duty

MODE Pin Output Format Cycle Stablizer

0 Offset Binary Off

1/3V

Offset Binary On

2/3V

2’s Complement On

2’s Complement Off

Overflow Bit

When OF outputs a logic high the converter is either

overranged or underranged.

1 2 ... 9 10 11 12 13 14 15 16 17 18 19 20

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