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ADS7865

SBAS441C –OCTOBER 2008–REVISED APRIL 2012

www.ti.com

RESET

reference stable (see the previous discussion of

REF

). For applications that use an external

The ADS7865 features an internal power-on-reset

reference source, the internal reference can be

(POR) function. When the device is powered up, the

disabled using bit RP in the SDI Register (see the

POR sets the device to default mode when AVDD

Digital section). The settling time of the REF

OUT

pin is

reaches 1.8V.

500μs (max) with the reference capacitor connected.

The default value of the REF

OUT

pin after power-up is

REF

2.5V.

The reference input is not buffered and is directly

For operation with a 2.7V analog supply and a 2.5V

connected to the ADC. The converter generates

reference, the internal reference buffer requires a rail-

spikes on the reference input voltage because of

to-rail input and output. Such buffers typically contain

internal switching. Therefore, an external capacitor to

two input stages; when the input voltage passes the

the analog ground (AGND) should be used to

mid-range area, a transition occurs at the output

stabilize the reference input voltage. This capacitor

because of switching between the two input stages.

should be at least 470nF. Ceramic capacitors (X5R

In this voltage range, rail-to-rail amplifiers generally

type) with values up to 1μF are commonly available

show a very poor power-supply rejection.

as SMD in 0402 size.

As a result of this poor performance, the ADS7865

REF

OUT

buffer has a fixed transition at DAC code 509

(0x1FD). At this code, the DAC may show a jump of

The ADS7865 includes a low-drift, 2.5V internal

up to 10mV in its transfer function.

reference source. This source feeds a 10-bit string

DAC that is controlled via the DAC register. As a

Table 3 lists some examples of internal reference

result of this architecture, the voltage at the REF

OUT

DAC settings.

pin is programmable in 2.44mV steps and can be

adjusted to specific application requirements without

Table 3. Reference DAC Setting Examples

the use of additional external components.

DECIMAL HEXADECIMAL

REFOUT

CODE BINARY CODE CODE

However, the DAC output voltage should not be

0.500V 205 00 1100 1101 CD

programmed below 0.5V to ensure the correct

functionality of the reference output buffer. This buffer

1.241V 508 01 1111 1100 1FC

is connected between the DAC and the REF

OUT

pin,

1.240V 509 01 1111 1101 1FD

and is capable of driving the capacitor at the REF

2.500V 1023 11 1111 1111 3FF

pin. A minimum of 470nF is required to keep the

1 2 ... 11 12 13 14 15 16 17 18 19 20 21 ... 32 33

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