ADC 2 Especificaciones descargar pdf (Pagina 8)

CLOCK

CONVST

10ns

Cyc el 1

Cyc el 2

B C

10ns

5ns 5ns

ADS7865

SBAS441C –OCTOBER 2008–REVISED APRIL 2012

www.ti.com

TIMING REQUIREMENTS

(1)

ADS7865

PARAMETER TEST CONDITIONS MIN TYP MAX UNIT

CONV

Conversion time f

CLOCK

= 32MHz 13 t

CLK

ACQ

Acquisition time 62.5 ns

CLK

CLOCK frequency 1 32 MHz

CLK

CLOCK period 31.25 1000 ns

CLKL

CLOCK low time 9.4 ns

CLKH

CLOCK high time 9.4 ns

CONVST low time 20 ns

CONVST falling edge to BUSY high

3 ns

delay

(2)

CONVST high time 20 ns

RD falling edge to BUSY high setup time 1 t

CLK

14th CLOCK rising edge to BUSY low delay 3 ns

See Figure 1

CS falling edge to RD or WR falling edge

0 ns

setup time

CS rising edge to RD or WR rising edge

0 ns

hold time

WR low time 10 ns

RD high time between two read accesses 10 ns

RD falling edge to output data valid delay 20 ns

Output data hold time 5 ns

Input data setup time 10 ns

Input data hold time 5 ns

Input data still valid to CONVST falling edge

31.25 ns

setup time

(1) All input signals are specified with t

= t

= 1.5ns (10% to 90% of BV

) and timed from a voltage level of (V

+ V

)/2.

(2) Not applicable in auto-Nap power-down mode.

NOTE: All CONVST commands that occur more than 10ns before the rising edge of cycle '1' of the external clock (Region 'A') initiate a

conversion on the rising edge of cycle '1'. All CONVST commands that occur 5ns after the rising edge of cycle '1' or 10ns before the rising

edge of cycle '2' (Region 'B') initiate a conversion on the rising edge of cycle '2'. All CONVST commands that occur 5ns after the rising edge

of cycle '2' (Region 'C') initiate a conversion on the rising edge of the next clock period.

The CONVST pin should never be switched from LOW to HIGH in the region 10ns before the rising edge of the CLOCK and 5ns after the

rising edge (gray areas). If CONVST is toggled in this gray area, the conversion could begin on either the same rising edge of the CLOCK or

the following edge.

Figure 2. CONVST Timing

1 2 3 4 5 6 7 8 9 10 11 12 13 ... 32 33

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