
MYXPM6021*
Revision 1.1 - 10/21/14
*Advanced information. Subject to change without notice.
65
MYXPM6021*
Form #: CSI-D-685 Document 011
10 I2C Interface
10.1 Overview
The MYXPM6021 is a slave-only device that is mastered by the SoC. It resides off the SoC’s I2C. The slave device
implementedonMYXPM6021sideisanasynchronousimplementationandwillsupportthehighspeedmode(3.4MHz).
SomeofthemainfeaturesfortheI2Cslaveare:
• MYXPM6021isaccessedusinga7-bitaddressingscheme.
• Theinterfacedrawsminimumpowerwhennotactivelyreading/writingregisters.
• Theslaveadaptstotheincomingfrequencywithoutanycommunicationastheprotocolforfastmodeandhigh
speedmodeisthesame.
• 2SlaveAddressaresupported.Eachaddressistargetinga256registerpageinsideMYXPM6021.
• Sequentialoffsetaccesseswithinasingletransaction(burstreadsandwrites)arenotrequired.
10.2 Slave Addresses
TheMYXPM6021supportsthestandardI2Creadandwritefunctions.Thecongurationregisterspaceisdividedinto
two256-bytepartitions.TheMYXPM6021supportsve7-bitdeviceaddressestoaccesseachofthe256bytepartitions.
Notethatin8-bitformat,theseaddressescorrespondto0xBCand0xDCforwrites,and0xBDand0xDDforreads.
InordertoavoidconictwiththeassignedaddressestheslaveaddresseswillbeprogrammableviaOTP.
Table 39: I2C Slave Addresses
Slave Address Read Address Write Address
Device 1 0x5E 0xBC 0xBD
Device 2 0x6E 0xDC 0xDD
Theslaveaddressesneedtobelockedinordertoavoidthatsoftwarecanoverwritethemanddisablethecommunication.
10.3 Protocol
ReadsfromPMICregistersfollowthe“combinedprotocol”asdescribedintheI2Cspecication,inwhichtherstbyte
written is the register offset to be read, and the rstbyte read(after a repeat START condition) isthe data from that
registeroffset.Seetheguresbelowfordetails.Thefollowingdiagramscapturethedifferenthighspeedandfast-speed
transactionformat/protocol
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